Data Converter Selection

Data Converter Accuracy and Selection

A data converter is the chip that crosses the line between the analog world and the digital one, an ADC turning a voltage into a number and a DAC turning a number back into a voltage. It is where a measurement becomes data, so its accuracy sets a ceiling no amount of processing behind it can lift. Whatever the sensor and the amplifier achieve arrives at the converter, and what the converter loses there is gone before the first line of code runs. The selection turns less on the bit count printed on the front of the datasheet than on the real accuracy and the conversion method, since a converter that claims sixteen bits and delivers twelve useful ones is a twelve-bit part at a sixteen-bit price.

Why the stated bits are not the accuracy

The number of bits sets the resolution, the size of the smallest step the converter can represent, and it says nothing on its own about how accurate those steps are. The figure that matters is the effective number of bits, and understanding why ENOB matters more than the stated bits is the first correction a real selection makes, because the converter’s own noise and distortion eat into the resolution until only the effective bits carry signal. A sixteen-bit part with thirteen effective bits is doing thirteen-bit work, and the three bits below that are filled with the part’s own noise, so paying for the higher resolution buys nothing the design can read.

Two static errors decide how straight the conversion is. Knowing what INL and DNL mean for linearity tells you whether the steps are even and whether the transfer curve bends, and a part with poor differential nonlinearity can miss codes outright, so a smooth ramp at the input shows a flat spot at the output where a code never appears. Integral nonlinearity bends the whole transfer curve instead, so the error changes across the range and a calibration taken at one point does not hold at another.

None of this is on the front page.

The headline is the bit count and the sample rate, and the accuracy lives in the noise, the distortion, and the linearity figures further in. A converter chosen on its resolution alone, with the noise and linearity skipped, is the one that turns up later resolving fewer bits than the schematic assumed, with the lost ones buried in its own error.

Speed pulls against accuracy in the same way. A converter rated at a high sample rate often reaches its full resolution only well below that rate, since the noise it averages out at low speed has no time to settle at high speed, so the headline sample rate and the headline bit count rarely hold at the same time. Reading the dynamic figures, the signal-to-noise ratio and the distortion at the frequency and rate the design will use, is how the real performance gets pinned down. The datasheet usually plots these against input frequency, and the curve falls off as the signal speeds up, so a part that looks clean at a kilohertz can lose effective bits by the time the input reaches the top of its band. Reading that plot at the design’s real input frequency, and not at the friendly low-frequency number, is what separates the resolution on the page from the resolution on the board.

Matching the converter type to the signal

The conversion architecture is the choice under the part number, since each one trades resolution against speed in a different way. Working through choosing between SAR, sigma-delta, and pipeline ADCs is how the type gets matched to the signal: a SAR part gives moderate resolution at a quick, predictable conversion; a sigma-delta trades speed for high resolution on slow signals, reaching twenty bits and beyond; a pipeline reaches the high sample rates a SAR cannot, at the cost of latency and power. The signal decides the type before any part number enters the search, since a slow thermocouple and a fast video line ask for opposite ends of that trade. A sigma-delta also brings a built-in digital filter and a slow settling after a channel change, which suits a fixed sensor and frustrates a fast multiplexed scan, so the architecture carries habits beyond its headline resolution and speed.

That maps onto real families. For slow, high-resolution sensor work, a part chosen by weighing the ADI AD7124 against the AD7172 covers the sigma-delta end, and the TI ADS1256 for industrial data acquisition is a long-running default where industrial channels need real resolution. Where the design needs many channels at moderate speed, the throughput of the TI ADS8688 multichannel SAR ADC sets how fast it can scan them, and at the fast end the ADI high-speed ADCs in current designs cover the pipeline and RF-sampling work. For a cost-driven board with a handful of channels, a part like the Microchip MCP3204 and MCP3208 fits the modest jobs without overpaying. The channel count is part of the architecture choice too, since a multiplexed converter shares one core across many inputs and settles between them, while a simultaneous-sampling design gives each channel its own converter for signals that have to be caught at the same instant.

The DAC side answers the same way, by output rather than input. The DAC also needs the same attention to its reference and its output drive that an ADC needs at its input. Choosing between the TI DAC7311 and DAC8551 sets the resolution and settling for a control voltage, and a loop-powered part like the loop-powered ADI AD5421 4-20mA DAC drives an industrial current loop from the loop’s own supply, a trick that lets a transmitter run on the same two wires that carry its output. The settling time matters on a DAC the way conversion noise matters on an ADC, since a control loop waiting on a slow-settling output runs no faster than the converter lets it.

The parts of the signal path that decide the result

A converter is only as good as the reference it measures against, since every code it produces is a ratio of the input to that reference. A reference that drifts with temperature moves every reading with it, so a sixteen-bit converter on a cheap reference delivers far fewer trustworthy bits, and the reference is chosen with the same care as the converter, not dropped in once the converter is settled. The reference noise and its temperature coefficient go straight into the reading, and on a high-resolution part the reference is often the part that sets the real accuracy, not the converter at all.

Grounding and layout close the list. A converter resolving microvolts per code sees the noise on its ground and reference traces as signal, so a split in the ground plane or a reference trace run beside a clock can cost bits that the part itself would have delivered. The board around the converter is part of its accuracy, which is why a precision data-acquisition layout is treated as carefully as the part choice.

The filtering ahead of the converter matters as much. Reading 4-20mA industrial signals into an ADC is a common front-end job, and getting that front end right means scaling the current to the converter’s input range and filtering it before it arrives. Sampling without an anti-alias filter folds high-frequency noise straight into the band of interest, and handling aliasing and anti-alias filtering is the step that keeps that noise out, because once a signal is aliased into the band no filter after the converter can separate it from the real input.

Input drive is the third front-end piece. A SAR converter’s sampling capacitor pulls a spike of charge at the start of each conversion, so the amplifier ahead of it has to settle that kick within the sampling window or the reading comes out short. The driver amplifier is matched to the converter’s input the way the reference is matched to its range, which is why a converter, its reference, its filter, and its driver are chosen together as one front end.

How converters get chosen and sourced

Data converters sit at the heart of a measurement, so a forced substitution late in a design is costly, since two parts with the same bit count and pinout can differ on noise, linearity, and reference behaviour in ways that move the result. A converter swapped on its resolution and footprint alone can quietly drop effective bits or shift its linearity, which shows up as a measurement that no longer matches the one the design was validated on. The cost of finding that out is a recalibration or a board respin, both of which land late, so the substitution is checked on the dynamic and linearity numbers before it reaches a build. An independent distributor that carries the converter lines across the SAR, sigma-delta, and pipeline families is where a design finds both the specified part and a substitute whose noise and linearity have been checked against the original.

Interface and packaging shape the swap as much as the analog spec. A converter that talks SPI does not drop into a footprint wired for parallel data, and a different resolution can change the register map the firmware drives, so a substitution touches the code as well as the board. A close electrical match with the wrong digital interface is no match at all, which is part of why the converter is pinned down early and second-sourced while the design is still open. The converter sits at the end of the chain that turns a physical quantity into data, the same path that runs from measuring current without opening the circuit through to the number a processor reads, so the part chosen here fixes the accuracy of everything upstream of it. A clean sensor and a careful amplifier are wasted on a converter that cannot hold their accuracy, and the reverse holds just as firmly, which is why the converter is specified against the signal it has to capture rather than picked from a shelf.

The judgment that fits

Choose a converter on its effective bits, its linearity, and the architecture that fits the signal, then give it a reference and a filter worthy of it. The twelve pages below take those accuracy terms and the major families one at a time, from the meaning of ENOB and linearity through the SAR, sigma-delta, and pipeline parts that fit each kind of signal.